1. Field
The present application relates to a data transfer device suitable for transferring digital data in high speed between electronic devices or between semiconductor elements and peripheral techniques of the data transfer device.
2. Description of the Related Art
Conventionally, it has been required to speed up a transfer of digital data. As a more secure and safer scheme, a data transfer of serial transmission scheme has been widely adopted. In this serial transmission scheme, a clock signal to be a reference for the transmission is transmitted, as a carrier wave, simultaneously with digital data, thereby enhancing a reliability of the data transfer.
However, in general, when the clock signal is used, the reliability of the transfer is enhanced, but, on the other hand, a phase of the clock signal with respect to the digital data may be shifted due to an influence of a transmission path and the like. In order to deal with such a problem, it is conceivable to previously perform a calculation of the transmission path using information and to reflect the calculation result on an A/W of a mount substrate, but, it takes time and there is a problem in terms of cost. Accordingly, techniques for adjusting the phase of the clock signal such as an application disclosed in, for example, Japanese Unexamined Patent Application Publication No. H11-3135 have been contrived.
In the above application, a phase comparison between digital data and a clock signal is performed, and a phase of the clock signal which is supplied to both a data output side and a data input side is adjusted based on the comparison result, to thereby deal with the aforementioned problem. However, in the above application, the configuration is complicated and it requires time for the adjustment.